Anup Gangwar is currently a Distinguished Engineer at Arm, Inc. based in Austin. He leads the Automated Synthesis team for Arm's Network-on-Chip family of products. He received his B.E degree in Electrical Communication Engineering from BIT, M.Tech in VLSI Design Tools and Technology from Indian Institute of Technology Delhi and Ph.D. in Computer Science and Engineering from Indian Institute of Technology Delhi.
Dr. Gangwar holds 14 patents across US and UK offices and has published 15 papers in international conferences and journals such as DAC, ICCAD and DATE. He is the recipient of the 2007 ACM Transactions on Design Automation of Electronic Systems (TODAES) best paper award.
Distinguished Engineer / Arm
Available from October 6 We discuss key architectural features: native support for multiple AMBA protocols (AXI/ACELite Issues F, G, H, AHB, APB), support for multiple Clock, Power and Voltage domain...