Cadence is an electronic design leader, building on 30+ years of computational software expertise. Cadence and Arm have collaborated for years to optimize PPA while speeding design and verification processes. Learn more at


Cadence and Arm have a long history of collaborating closely on complete system-to-silicon solutions. We’ve worked together to optimize performance, power, and area (PPA) while speeding design and verification processes. With more than 30 years of computational software expertise, Cadence applies its underlying Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and healthcare. Visit us at Arm DevSummit to learn more about creating better, more innovative Arm-based designs. Learn more at

Download content from this year’s Event Partners.

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Intelligent System Design

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Hyperscale Computing and Cadence

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Fujitsu Fugaku supercomputer addressing Arm-based requirements

Arm Cadence SoC HW-SW Development Solutions

Delivering Best-in-Class PPA and TAT for Arm Total Compute Using Cadence Digital Full Flow

Cadence Collaboration with Arm Enables Customers to Successfully Tapeout Next-Generation Arm Mobile Designs

Cadence Collaborates with Arm to Accelerate Hyperscale Computing and 5G Communications SoC Development


To hear more from this Event Partner, check out their Arm DevSummit sessions.


Oct 19
19:30 - 19:52
Accelerating System Level Verification of Arm CoreLink CMN-700 based SoCs and Systems

With the new generation of cache-coherent mesh interconnects used in SoCs and systems for high-performance computing (HPC) and data center applications, verification challenges continue to grow. The...

Nick Heaton

Distinguished Engineer, Cadence

David Koenen

Senior Product Manager of Interconnect IP, Arm

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Oct 21
16:30 - 16:57
Accelerating Safety and Security Verification of Arm v9-based Systems to the Pre-silicon Phase

Simultaneously designing and testing safety and security of both software and hardware before silicon is available has become a necessity to meet today’s market demands. This presentation illustrate...

Maxwell Hinson

Lead Technical Marketing Engineer, Green Hills Software

Frank Schirrmeister

Senior Group Director, Solutions & Ecosystem, Cadence Design Systems

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07:00 - 07:00
Gain PPA Advantage with New Aging-aware STA Solutions for High-Performance Semiconductor Designs

High-reliability semiconductor applications such as automotive and defense must operate predictably over long time spans. To ensure high reliability, designers require accurate methods of analyzing fu...

Satheesh Balasubramanian

Distinguished Engineer, Arm Physical Design Group, Arm

Paddy Mamtora

Senior Group Director, Product Engineering, Cadence

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07:00 - 07:00
Moving to the AMBA 5 CHI Interface Protocol at the DRAM Interface

Are you moving to the AMBA 5 CHI interface protocol between the CPU or Interconnect and the memory controller? There are a lot of changes from the AMBA 4 AXI protocol to the AMBA 5 CHI protocol. While...

Marc Greenberg

Product Marketing Group Director, Cadence

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